In a personal computer system, an interface, which is called an AT interface, is widely used to connect a host with its peripheral devices. HDD is a typical peripheral device. It is desired from a viewpoint of peripheral manufacturers that communications with a host through the AT interface be standardized, but some commands do allow more than one operation sequence. For example, a Read command for HDD is executed in either one of two operation sequences depending on when a status register of the HDD is read by the host. A first operation sequence is as follows:
1. When data (usually in one sector) becomes ready to be transferred to the host, the HDD sets a data request (DRQ) bit of its status register and at the same time asserts an interrupt request IRQ to the host.
2. Receiving the IRQ from the HDD, the host first reads the status register of the HDD. The IRQ is reset or dropped at that time because the IRQ is always reset whenever the status register is read by the host. The data transfer is then begun.
3. At the completion of the transfer of a sector of data, the HDD resets the DRQ bit.
4. Steps 1 to 3 are repeated until the number of requested sectors is reached.
In the above sequence, the host reads the status register before the data transfer is started, and therefore, this sequence is hereinafter referred to as "pre-read". However, some hosts handle the Read command as follows.
1. Same as Step 1 of the pre-read.
2. Receiving the IRQ from the HDD, the host first starts a data transfer which continues until the end of that sector.
3. Same as Step 3 of the pre-read.
4. The host reads the status register of the HDD (and thus the IRQ is reset).
5. Steps 1 to 4 are repeated until the number of requested sectors is reached.
In the second sequence, the host reads the status register after the transfer of a sector of data is completed, and therefore, this sequence is hereinafter referred to as "post-read". If the host operates in a post-read mode, a malfunction would occur in the case where an attempt to read the status register of the HDD to obtain a current sector status (Step 4 of the post-read) is made by the host after the HDD becomes ready to transfer a next sector of data (Step 1 following Step 4). In this case, an IRQ for the next sector is reset by the status register read for the previous sector transfer, which results in an abnormal situation where the host continues to wait for the IRQ for the next sector while the HDD continues to wait for the data transfer. In fact, such an abnormal situation occurs since the IRQ for the next sector is asserted by hardware as soon as the sector data becomes available.
To avoid the abnormal situation described above, it is necessary to assert the IRQ for the next sector after the host reads the status register. However, since the above abnormal situation will not occur when the host is in the pre-read mode, a scheme to merely delay the IRQ would present a problem in that the performance of data transfer is lowered when the host is in the pre-read mode. Therefore, the prior art has adopted a method in which a switch is set according to whether the host is in the pre-read mode or the post-read mode and, in case of the post-read, the IRQ is asserted again immediately after the status register is read, instead of delaying the IRQ. Thus, the performance is not lowered even in case of the post-read. However, in modern hosts, there are many cases where either one of the pre-read and post-read modes is used depending on an operating system (OS) (E.g., the pre-read and the post-read modes are used under OS/2 and conventional DOS, respectively) and therefore the switch must be set each time of the mode changes.
Another method uses a microcode to entirely control the IRQ. In this method the IRQ is always asserted late which means that both the pre-read and post-read modes function normally. However, the overall performance is not as good as that attainable in a hardware solution.